Specman Jobs Jobs - Find the most exclusive Specman Jobs in India

View

Refer

Apply

Specman based verification Engineer for Pune

Required Skills An excellent knowledge of digital design / verification techniques Minimum 2yrs experience with Specman based verification for developing VE, VC, writing tests, functional coverage. Experience of VHDL and/or Verilog programming languages. Exposure to scripting language/s

Updated: 2012-Mar-09 01:02 AM

Industry: Hardware, SemiconductorRole: Specman based verification

Experience Level: 2.0 to 4.0 yrsLocation: Pune (India)

Employer: + IT

Keywords: Specman Verification

View

Refer

Apply

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Primary responsibilities will include Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification...

Updated: 2013-Apr-18 06:14 PM

Industry: IT ProductsRole: Design Engineer– VLSI - Verification(Specman/System Verilog)

Experience Level: 2.0 to 7.0 yrsLocation: Pune (India)

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

View

Refer

Apply

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Primary responsibilities will include Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification...

Updated: 2013-Mar-26 05:54 PM

Industry: IT ProductsRole: Design Engineer– VLSI - Verification(Specman/System Verilog)

Experience Level: 2.0 to 7.0 yrsLocation: Pune (India)

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

View

Refer

Apply

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Primary responsibilities will include Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification...

Updated: 2013-Mar-26 10:20 AM

Industry: IT ProductsRole: Design Engineer– VLSI - Verification(Specman/System Verilog)

Experience Level: 2.0 to 7.0 yrsLocation: Pune (India)

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

View

Refer

Apply

VLSI - Verification

VLSI - Verification The Role Primary responsibilities will include Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...

Updated: 2012-Nov-12 11:06 AM

Industry: Semiconductor, HardwareRole: VLSI - Verification

Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)

	0 Functional Areas selected select all \| select none \| close
Location :	Experience :	Search

Specman Jobs

Specman based verification Engineer for Pune

Keywords: Specman Verification

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

Jobs for Design Engineer– VLSI - Verification(Specman/System Verilog) with Product Development MNC at Pune

Keywords: Specman/System Verilog OVM UVM TLM OVM UVM TLM OVM UVM TLM

VLSI - Verification

Keywords: VLSI Verification