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JOBS : Semiconductor Jobs opportunity in Bangalore

Hi All, We have openings for Semiconductor @ Bangalore on the following positions. 1) Jobs for ASIC Verification Professional 2) Jobs for Physical Design Engineers 3) DFT Engineer Jobs 4) Jobs for STA Synthesis Engineers 5) Jobs for Physical Design Manager Email your resume to saku@roljobs.com

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: Semiconductor Jobs

Experience Level: 3.0 to 11.0 yrsLocation: Bangalore (India)

Keywords: Semiconductor ASIC

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semiconductor jobs

Semiconductor Jobs ASIC Verification (USA/Bangalore) Physical design (USA/Bangalore) STA Static Timing Analysis/STA Synthesis Engineer (Bangalore) RTL Design (Bangalore) DFT Engineers ( Bangalore )

Updated: 2012-May-17 06:53 PM

Industry: SemiconductorRole: Design OR Verification

Experience Level: 2.0 to 15.0 yrsLocation: Bangalore (India)

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

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semiconductor jobs

Semiconductor Jobs ASIC Verification (USA Bangalore Hyderabad) Physical design (USA Bangalore/Hyderabad) STA Static Timing Analysis (Bangalore/Hyderabad) RTL Design (Chennai/Bangalore/Hyderabad) DFT Engineer ( Bangalore/Hyderabad )

Updated: 2012-May-01 08:04 PM

Industry: SemiconductorRole: Design OR Verification

Experience Level: 2.0 to 15.0 yrsLocation: Bangalore Hyderabad (India)

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

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semiconductor jobs

Semiconductor Jobs ASIC Verification (USA Bangalore Hyderabad) Physical design (USA Bangalore Hyderabad) STA Static Timing Analysis (Bangalore Hyderabad) RTL Design (Chennai Bangalore Hyderabad) DFT Engineer ( Bangalore Hyderabad )

Updated: 2012-Apr-10 03:51 PM

Industry: SemiconductorRole: Design OR Verification

Experience Level: 3.0 to 13.0 yrsLocation: (India)

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

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semiconductor jobs

Semiconductor jobs Verification Physical Design STA DFT RTL Design

Updated: 2012-Mar-19 05:10 PM

Industry: SemiconductorRole: Design Engineer

Experience Level: 2.0 to 13.0 yrsLocation: (India)

Keywords: "system verilog" systemverilog" "physical design" "physicaldesign" "soc encounter" "DFT" "BIST" "STA" "ststic timing analysis" "rtl design"

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Semiconductor Jobs

Physical Design Engineer Physical design tool experience in Synopsys IC Compiler / Magma Talus / Cadence SoC Encounter Physical Design scripting using Tcl or Perl

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: "Physical Design"

Experience Level: 3.0 to 7.0 yrsLocation: (India)

Keywords: "Physical design" "SoC Encounter" "IC Compiler" "Magma talus""floor planning"

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Semiconductor Jobs in India & USA

Expereince: 2-10 Years Location : India USA Education:B.E/B.Tech/M.E/M.Tech/M.S Skills: 1. Strong background of ASIC Physical Design 2. Floor Plan, Place Route , Timing Analysis, Synthesis, Clock Tree Synthesis 3. Expertise in Scripting Languages like Perl TCL

Updated: 2012-May-24 02:37 PM

Industry: SemiconductorRole: Physical Design Engineer/Lead

Experience Level: 2.0 to 10.0 yrsLocation: Bangalore Hyderabad Noida (United States)

Keywords: Physical Design Floor plan STA Synthesis IR Drop Analysis

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Semiconductor Jobs openings

Physical Design Engineer Jobs in USA Physical design experience in IC Compiler / Magma Talus / SoC Encounter .

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: "Physical Design"

Experience Level: 3.0 to 7.0 yrsLocation: (United States)

Keywords: "Physical design" "SoC Encounter" "IC Compiler" "Magma talus""floor planning"

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Semiconductor - Verification Engineer Jobs

Physical Design Engineer Jobs in USA ASIC Verification Engineer required with experience in Specman / System Verilog/OVM/VMM .

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: "Verification Engineer"

Experience Level: 3.0 to 7.0 yrsLocation: (United States)

Keywords: "Verification Engineer"SVASpecman

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Hiring for Verification Professionals @ Product based semiconductor

Experience : 4 - 10 years Domain Expertise (must) : USB (2.0, 3.0), AHB, AXI, APB, PCI Express • Languages: Verilog(must), system Verilog, VHDL, Vera/Specman, C, C++ • EDA Tools: ModelSim (must), VCS, NCSim, NCVerilog • Verification Environment: Soc Level, module Level • Tool...

Updated: 2012-Apr-25 12:51 PM

Industry: SemiconductorRole: Verication Engineer

Experience Level: 4.0 to 10.0 yrsLocation: (India)

Keywords: USB

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Semiconductor Jobs - Physical Design Professionals

Job Description for Physical Design Engineer:- Role: Physical Design Engineer Years of Experience: 2 to 10 Years Qualification: BE/ME/BTECH/MTECH Job Location: Bangalore If you are interested, Kindly send me your updated profile to saku@roljobs.com

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: Physical Design Engineer

Experience Level: 2.0 to 10.0 yrsLocation: Bangalore (India)

Keywords: Physical Design ICC SOC Encounter

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Semiconductor Jobs - Physical Design Manager @ Bangalore

Semiconductor Jobs - Physical Design Manager @ Bangalore - Email your resume to saku@roljobs.com Role: Physical Design Manager, Years of Experience: 8 to 16 Years, Qualification: BE/ME/BTECH/MTECH, Job Location: Bangalore.

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: Physical Design Manager

Experience Level: 8.0 to 15.0 yrsLocation: Bangalore (India)

Keywords: Physical Design

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SEMICONDUCTOR JOBS : DFT Engineer /Lead

JOB : DFT Engineer openings @ Bangalore

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: DFT Engineer

Experience Level: 2.0 to 10.0 yrsLocation: Bangalore (India)

Keywords: DFT Engineer

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Semiconductor Jobs : Verification Engineer @ Sanjose

Verification Engineer opportinity @ Sanjose,CA Verification using System verilog Methodology : OVM, VMM. Professional interested can revert to saku@roljobs.com or can call @ 080 -42821621

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: ASIC Verification Engineer

Experience Level: 3.0 to 8.0 yrsLocation: San Jose, California (United States)

Keywords: "system verilog" "Systemverilog"

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Don't miss this Golden Opportunity for Onsite with a leading Semiconductor Company!!

Dear All, Hope you are doing well!! Wanted to share with you some great opportunities for Onsite in VLSI Domain. Hot Openings : 1) Asic Verification Engineers with 4-8 Years experience. 2)Physical Design Engineers with 4-8 Years experience.

Updated: 2012-Mar-19 12:48 PM

Industry: SemiconductorRole: Asic Verification & Physical Design Engineers

Experience Level: 4.0 to 8.0 yrsLocation: (India)

Keywords: System Verilog SoC Encounter OVM ICC

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Opening for PNR with Product Based MNC Semiconductor @ Greater Noida.

The incubent will be responsible for Physical Implementation of Imaging SoC"s. Primarily - BE (Floor Plan, PNR, Clock-tree, TA, IRdrop, Sign-ff, Mask finishing) and participate in FE (synthèses, TA, Formal Verification, Sign-off, Hand-off)

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: PNR

Experience Level: 1.0 to 2.0 yrsLocation: Greater Noida (India)

Keywords: place and route (PNR) Cadence Magma Synopsys PNR tools SoC Signoff floor plan

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Openings For Firmware Developer in a Semiconductor domain MNC @ Greater Noida

Looking For Firmware Developer Developing firmware for Image Processors.

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: Firmware Developer

Experience Level: 1.0 to 2.0 yrsLocation: Greater Noida (India)

Keywords: Firmware

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Firmware Developer opening in a Semiconductor domain MNC @ Greater Noida

Looking For Firmware Developer Developing firmware for Image Processors.

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: Firmware Developer

Experience Level: 1.0 to 2.0 yrsLocation: Greater Noida (India)

Keywords: Firmware

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Openings for Backend Design Engineer with leading semiconductor company@Bangalore

Responsibilities : - Digital Electronics OPAMPS , Flip Flop’s , Counters . - Digital CMOS logic circuits and design . - Basic Analog Circuits.

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: BackEnd Design Engineer

Experience Level: 1.0 to 2.0 yrsLocation: Greater Noida (India)

Keywords: BackEnd Design netlist to gds OPAMPS Flip Flop CMOS

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SEMICONDUCTOR JOB : STA & Synthesis Engineer openings in Bangalore

Synthesis/STA Engineer with a US Service based MNC in Bangalore –Email your resume to saku@roljobs.com Job Description Role: STA/Synthesis Engineer, Years of Experience: 2 – 10 Years, Qualification: BE/ME/BTECH/MTECH, Job Location: Bangalore

Updated: 2012-Mar-09 01:02 AM

Industry: SemiconductorRole: STA/Synthesis Engineer

Experience Level: 2.0 to 10.0 yrsLocation: Bangalore (India)

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Semiconductor Jobs

Keywords: Semiconductor ASIC

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

Keywords: "Physical design" "Verification" "STA" "RTL Design" "DFT"

Keywords: "system verilog" systemverilog" "physical design" "physicaldesign" "soc encounter" "DFT" "BIST" "STA" "ststic timing analysis" "rtl design"

Keywords: "Physical design" "SoC Encounter" "IC Compiler" "Magma talus""floor planning"

Keywords: Physical Design Floor plan STA Synthesis IR Drop Analysis

Keywords: "Physical design" "SoC Encounter" "IC Compiler" "Magma talus""floor planning"

Keywords: "Verification Engineer"SVASpecman

Keywords: USB

Keywords: Physical Design ICC SOC Encounter

Keywords: Physical Design

Keywords: DFT Engineer

Keywords: "system verilog" "Systemverilog"

Keywords: System Verilog SoC Encounter OVM ICC

Keywords: place and route (PNR) Cadence Magma Synopsys PNR tools SoC Signoff floor plan

Keywords: Firmware

Keywords: Firmware

Keywords: BackEnd Design netlist to gds OPAMPS Flip Flop CMOS

Keywords: STA/Synthesis Engineer