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Job : Job opening-FPGA Manufacturer(ATPG,C/C++,BIST)-Sr.Manufacturing Test Development Engineer,Hyderabad
Brought to you by : Roland and Associates   09 02 2010 09:29:24 +0000
Industry : Semiconductor
Role : Sr Manufacturing Test Development Engineer
Functional Area : Embedded, EDA, VLSI, ASIC & Chip Design
Experience level:  6.0 to 11.0 years
Must Have Skills / Tags :

FPGA

Additional Skills / Tags :

C++ ATPG

 
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Sr.Manufacturing Test Development Engineer

About this position:

You will join the Manufacturing Test Development team to develop and deploy test concepts on real silicon. In this role you will have an opportunity to understand in depth new Flash FPGA architectures. You will work closely with silicon design engineers, software engineers, Yield enhancement engineers and test engineers to ensure the company deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required.

Job duties include:

  • Generating, verifying and debugging manufacturing test designs and firmware for new Flash-based FPGA families.

  • Improving, extending and porting existing manufacturing test designs to all FPGA family members.

  • Support Failure Analysis and help with silicon debug and ramp up.

  • Leading the MTD team

  • Test specification, plan, and documentation

  • Cross-functional team interfacing and collaboration in all activities

Required Skills and Experience:

  • BS or MS in EE and a minimum of 6 years of experience in Design for Test or Test development

  • Hands-on experience with Programming/software in C/C++

  • Firmware Development: 8051 and ARM are preferred

  • Hands-on experience with Verilog Hardware Description Language

    • Behavioral, RTL and Gate Level coding, Programming Language Interface

  • Hands-on experience with at least 3 aspects of Logic Testing and Design for-Testability including:

    • Fault Simulation Methodologies and tools such as TurboFault,

    • Scan Design & ATPG (TetraMax, FastScan, DFTCompiler…)

    • Test Generation,

    • Signature Analysis,

    • Memory BIST design with tools such as MBIST architect.

    • Delay Faults

  • Exposure to ASIC/FPGA design flow and methodology is required

    • HDL, synthesis, static timing analysis, constraining, Place & Route

  • Understanding of semiconductor technologies and related yield issues

  • Comfortable with Unix, Fluent in Perl and/or Shell scripting, agile with Make, and familiar with Revision Control (CVS, SVN, …)

  • Experience in Project Management is highly desired

  • Strong analytical and problem solving skills

  • Excellent communication, documentation and presentation skills.

  • Must have strong self learning ability, leadership, and enjoy working in teams

Preferred Skills:

  • Working knowledge of JAVA programming

  • Experience with Boundary Scan (IEEE 1149.1)

  • (IEEE 1149.1 Standard, TAP Controller, applications)

  • Basic Knowledge on Manufacturing Test Systems (such as Teradyne J750)

  • Working knowledge of SOC and/or FPGA Architectures

  • VHDL

  • Analog and mixed signal circuit design

  • Leading a small team

  • Industry experience with 90nm and/or 65nm technologies is a strong plus.

Contact information for Job opening-FPGA Manufacturer(ATPG,C/C++,BIST)-Sr.Manufacturing Test Development Engineer,Hyderabad:
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