Title –  Design Engineer

Experience Level : 2 – 4 years

Education: B.E/B.Tech

Location:Bangalore

Role:

Memory Design group at Bangalore is involved in design of all types of memory generators like SRAM generators, Register files, ROM generators etc.
Right from the spec definition to the test chip releases. The candidate’s role includes:
Define and Improve high speed and/or low power memory architectures
Perform the bit cell evaluation and identify the read/write issues associated with it,
Write vectors and perform functional verification of memory
Timing/Power analysis and characterization
Physical verification and DFM, DFY analysis

Essential Technical Skills:

2 – 4 years of relevant circuit design experience
Experience working with circuit simulation tools and techniques.
Experience working with Hercules/Calibre drc/lvs verification tools
Fundamental understanding of Design For Manufacturability (DFM)
Familiarity with Cadence Virtuoso (DFII, Opus) layout environment

Regards,
Sharmila